. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . . . . . . . . Generation of Executable State-Based Models for Efficient Performance Evaluation of Embedded System Architectures Sébastien Le Nours University of Nantes, France February 6, 2014 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 1 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Embedded system architecture An architecture is an organization of components that is elaborated under constraints. It designates also the principles guiding its design. Proc. Mem. Hardware abstraction Real time kernel RTOS API I/O F1 F2 DSP Mem. Low level drivers I/O F3 F4 Memory controller D1 D2 Bus controller Communication IF F5 F6 Bridge Arbiter Hardware resources Software resources Dedicated hardware resources Memory Specialized processor General purpose processor Mapping to the platform Communication bus Platform level Functional architecture Physical architecture S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 2 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Purpose of the system architecting process Creation of components’ organization and definition of components’ characteristics. Performance evaluation: analysis of resource usage over time. Proc. Mem. Hardware abstraction Real time kernel RTOS API I/O F1 F2 DSP Mem. Low level drivers I/O F3 F4 Memory controller D1 D2 Bus controller Communication IF F5 F6 Bridge Arbiter Hardware resources Software resources Dedicated hardware resources Memory Specialized processor General purpose processor Mapping to the platform Communication bus Platform level Functional architecture Physical architecture Speed, size of memories ? Functional architecture organization ? Physical architecture organization ? Scheduling policies of RTOS ? Computation performance of processor ? Characteristics of communication resources ? Number of logic resources ? Size of interface buffers ? S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 3 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Architecture design flow Specification of hardware Specification of software What ? How ? System requirements System specifications System architecting Gates Assembly code Real prototype for validation and verification Detailed co-simulation Hardware description languages Software programming languages Low level co-simulation High level co-simulation S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 4 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Time description accuracy Different levels of accuracy are used during the architecture design process. Efficiency of models is a matter of compromise between accuracy, simulation speed, and modelling effort. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 5 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Time description accuracy Different levels of accuracy are used during the architecture design process. Efficiency of models is a matter of compromise between accuracy, simulation speed, and modelling effort. Real prototype: Execution close to real-time, but very long design cycle. P1 P2 ts Usage of resources N : Measurements P3 execution time Specification of hardware Specification of software What ? How ? System requirements System specifications System architecting Gates Assembly code Real prototype for validation and verification Detailed co-simulation Hardware description languages Software programming languages Low level co-simulation High level co-simulation S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 5 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Time description accuracy Different levels of accuracy are used during the architecture design process. Efficiency of models is a matter of compromise between accuracy, simulation speed, and modelling effort. Continuous time model: Very accurate execution but very slow, long design cycle. P1 P2 ts Usage of resources N : Estimation P3 simulation time Specification of hardware Specification of software What ? How ? System requirements System specifications System architecting Gates Assembly code Real prototype for validation and verification Detailed co-simulation Hardware description languages Software programming languages Low level co-simulation High level co-simulation S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 5 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Time description accuracy Different levels of accuracy are used during the architecture design process. Efficiency of models is a matter of compromise between accuracy, simulation speed, and modelling effort. Discrete time model: Accurate execution but with limited speed, long design cycle. P1 P2 ts Usage of resources N : Estimation P3 simulation time Specification of hardware Specification of software What ? How ? System requirements System specifications System architecting Gates Assembly code Real prototype for validation and verification Detailed co-simulation Hardware description languages Software programming languages Low level co-simulation High level co-simulation S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 5 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Time description accuracy Different levels of accuracy are used during the architecture design process. Efficiency of models is a matter of compromise between accuracy, simulation speed, and modelling effort. Discrete event model: Fast execution with limited accuracy, reduced design cycle. P1 P2 ts Usage of resources N : Estimation P3 simulation time Specification of hardware Specification of software What ? How ? System requirements System specifications System architecting Gates Assembly code Real prototype for validation and verification Detailed co-simulation Hardware description languages Software programming languages Low level co-simulation High level co-simulation S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 5 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Current trends in the embedded system domain . Observation . . . . . . . . Dissemination, interaction, heterogeneity ... Design complexity is related to integration of more and more heterogeneous components Needs of methods to facilitate the system architecting process and to allow performance evaluation . Presented contribution . . . . . . . . An approach (methods, models, and tool) to facilitate the creation of efficient performance models with light modelling effort. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 6 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Current trends in the embedded system domain . Observation . . . . . . . . Dissemination, interaction, heterogeneity ... Design complexity is related to integration of more and more heterogeneous components Needs of methods to facilitate the system architecting process and to allow performance evaluation . Presented contribution . . . . . . . . An approach (methods, models, and tool) to facilitate the creation of efficient performance models with light modelling effort. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 6 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Presentation schedule . . . 1 Context of the study . . . 2 Addressed topic . . . 3 Proposal and results . . . 4 Opened prospects . . . 5 Sum-up and conclusion S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 7 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Principles of performance evaluation approaches Physical architecture model Executable model Functional architecture model Platform resources model Mapping System specifications Generation Proc. Mem. Hardware abstraction Real time kernel RTOS API I/O Bus controller Communication IF Bridge Dedicated hardware resources General purpose processor F1 F2 F3 Proc. Mem. Hardware abstraction Real time kernel RTOS API I/O Bus controller Communication IF Bridge Dedicated hardware resources General purpose processor Discrete event simulation Performance evaluation according to working scenarios Tuning of architecture parameters F1 F2 F3 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 8 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Current performance evaluation approaches Approach Functional architecture model Framework Platform model accuracy SCE [1] PSM SCE Task accurate Daedalus [2] KPN Sesame Task accurate SystemCoDesigner [3] SysteMoC SystemCoDesigner Task accurate Metropolis [4] PN _ Task accurate Arpinen et al. [5] UML/KPN _ Task accurate Kreku et al. [6] UML VTT_ABSOLUT Task accurate Bourgos et al. [7] KPN BIP Task accurate SpaceCoDesign [8] PN SpaceStudio Task accurate Expermeta [9] SysML MetaSyn Task accurate Mirabilis [10] PN VisualSim Task accurate Intel CoFluent [11] MCSE CoFluent Studio Task accurate S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 9 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Illustration: architecture performance modelling Functional architecture modelling: ideal organization of performed communication and computation. Workload model: expression of communication and computation loads with no complete functionality description required. F1 F3 F2 M1 M2 M4 M3 M5 Functional architecture model while(1) { read(M2,token); execute(token); read(M4,token); execute(token); write(M5,token); } while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } F4 F0 F1 F2 F3 while(1) { read(M3,token); execute(token); write(M4,token); } M6 F4 while(1) { read(M5,token); execute(token); write(M6,token); } S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 10 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Illustration: architecture performance modelling Physical architecture modelling: organization of communication and computation performed under constraints. Platform model: kind of processing resources, scheduling and arbitration policies, . . . F1 F3 F2 M1 M2 M4 M3 M5 Platform P1 P2 N while(1) { read(M2,token); execute(token); read(M4,token); execute(token); write(M5,token); } while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } Mapping F4 F0 F1 F2 F3 while(1) { read(M3,token); execute(token); write(M4,token); } M6 F4 while(1) { read(M5,token); execute(token); write(M6,token); } Platform properties: component attributes Functional architecture model S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 11 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Trace-driven simulation The platform resources are driven by traces generated by the application execution. The mapping layer manages the concurrency offered by the modeled platform. The simulation kernel manages events and the advancement of the simulation time. while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } F1 M1 M2 M3 Platform P1 N Mapping ts simulation time xM1 (0) P1 Resource usage S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 12 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Trace-driven simulation The platform resources are driven by traces generated by the application execution. The mapping layer manages the concurrency offered by the modeled platform. The simulation kernel manages events and the advancement of the simulation time. while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } F1 M1 M2 M3 Platform P1 N Mapping ts simulation time xM1 (0) F1: /execute() P1 Resource usage Ti1 (0) trace S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 12 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Trace-driven simulation The platform resources are driven by traces generated by the application execution. The mapping layer manages the concurrency offered by the modeled platform. The simulation kernel manages events and the advancement of the simulation time. while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } F1 M1 M2 M3 Platform P1 N Mapping ts simulation time xM1 (0) F1: /execute() P1 xM2 (0) Resource usage Ti1 (0) Simulation kernel trace wait() S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 12 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Trace-driven simulation The platform resources are driven by traces generated by the application execution. The mapping layer manages the concurrency offered by the modeled platform. The simulation kernel manages events and the advancement of the simulation time. while(1) { read(M1,token); execute(token); write(M2,token); execute(token); write(M3,token); } F1 M1 M2 M3 Platform P1 N Mapping ts simulation time xM1 (0) F1: /execute() P1 F1: /execute() xM2 (0) xM3 (0) Resource usage Ti1 (0) Tj1 (0) Simulation kernel trace wait() S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 12 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Illustration: architecture performance model simulation Possible observation of platform resource usage, power consumption, memory size, . . . Simulation of concurrent processes over the simulation time implies calls to the simulation kernel and time consuming context switches. Simulation time ts P1 P2 Resource usage xM1 (0) xM2 (0) xM3 (0) xM4 (0) xM5 (0) Ti1 (0) Tj1 (0) Ti2 (0) Ti3 (0) Tj3 (0) Ti1 (1) xM1 (1) xM2 (1) xM6 (0) Ti4 (0) F1: /execute() F1: /execute() F2: /execute() F3: /execute() F3: /execute() F4: /execute() F1: /execute() M1 M2 M3 M4 M1 M5 M2 M6 F1: /execute() Calls to the simulation kernel F1 F3 F2 M1 M2 M4 M3 M5 Platform P1 P2 N Mapping F4 F0 M6 Functional architecture model Simulation kernel S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 13 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Issue The compromise between simulation speed and accuracy limits the achievable complexity of architecture models. low medium high Simulation speed Accuracy low medium high How to limit the number of required calls to the simulation kernel ? S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 14 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Related work Combination of different levels of accuracy and adaptation during simulation Multi-Accuracy Power and Performance Transaction-Level Modeling [12] Accuracy-adaptive simulation of transaction level models [13] Retroactive correction methods Result-oriented modeling - a novel technique for fast and accurate TLM [14] Fast and accurate resource conflict simulation for performance analysis of multi-core systems [15] Combination of simulation and formal methods Combining simulation and formal methods for system-level performance analysis [16] Analytical timing estimation for temporally decoupled TLMs considering resource conflicts [17] S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 15 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Nature of the proposal . Main points . . . . . . . . A new approach for performance model generation, offering good compromise between simulation speed and accuracy. A computation method of architecture model evolution instants to limit the number of calls to the simulation kernel. The state-based model concept: combination between simulation and algebraic models. A generator tool for automatic creation of executable state-based models of architectures. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 16 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Computation method of model evolution instants Reduction of the number of calls to the simulator by dynamic computation of model evolution instants. F1 F2 M1 M2 M3 M1 xM1 (k) M2 M3 xM2 (k) xM3 (k) ts T1 (k) T2 (k) P1 P2 Mapping Simulation kernel Calls to the kernel N T1 (k+1) M1 T2 (k+1) xM4 (k) M3 F3 M4 P3 M4 M4 T3 (k) T3 (k+1) xM4 (k+1) xM1 (k+1) xM2 (k+1) xM3 (k+1) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 17 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Computation method of model evolution instants Reduction of the number of calls to the simulator by dynamic computation of model evolution instants. F1 F2 M1 M2 M3 M1 xM1 (k) M2 M3 xM2 (k) xM3 (k) ts T1 (k) T2 (k) P1 P2 Mapping Simulation kernel Calls to the kernel N T1 (k+1) M1 T2 (k+1) xM4 (k) M3 F3 M4 P3 M4 M4 T3 (k) T3 (k+1) xM4 (k+1) xM1 (k+1) xM2 (k+1) xM3 (k+1) M1 M4 Equivalent model M1 xM1 (k) ts M1 xM4 (k) M4 M4 xM4 (k+1) xM1 (k+1) /Compute_xM4 /Compute_xM4 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 17 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Computation method of model evolution instants Reduction of the number of calls to the simulator by dynamic computation of model evolution instants. F1 F2 M1 M2 M3 M1 xM1 (k) M2 M3 xM2 (k) xM3 (k) ts T1 (k) T2 (k) P1 P2 Mapping Simulation kernel Calls to the kernel N T1 (k+1) M1 T2 (k+1) xM4 (k) M3 F3 M4 P3 M4 M4 T3 (k) T3 (k+1) xM4 (k+1) xM1 (k+1) xM2 (k+1) xM3 (k+1) M1 M4 xM2 (k) = max(xM3 (k-1),T1 (k)+xM1 (k)) xM3 (k) = max(xM4 (k-1),T2 (k)+xM2 (k)) xM4 (k) = T3 (k)+xM3 (k) Equivalent model M1 xM1 (k) ts M1 xM4 (k) M4 M4 xM4 (k+1) xM1 (k+1) /Compute_xM4 /Compute_xM4 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 17 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Temporal decoupling method Preservation of the model accuracy by introduction of an observation time that evolves locally. ts P1 P2 F1 F2 M1 M2 M3 M1 xM1 (k) M2 M3 xM2 (k) xM3 (k) T1 (k) T2 (k) P1 P2 Mapping Simulation kernel N T1 (k+1) M1 T2 (k+1) xM4 (k) M3 F3 M4 P3 M4 M4 T3 (k) T3 (k+1) xM4 (k+1) P3 xM1 (k+1) xM2 (k+1) xM3 (k+1) Resource usage S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 18 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Temporal decoupling method Preservation of the model accuracy by introduction of an observation time that evolves locally. M1 M4 xM2 (k) = max(xM3 (k-1),T1 (k)+xM1 (k)) xM3 (k) = max(xM4 (k-1),T2 (k)+xM2 (k)) xM4 (k) = T3 (k)+xM3 (k) Equivalent model M1 xM1 (k) ts M1 xM4 (k) M4 M4 xM4 (k+1) xM1 (k+1) /Compute_xM4 /Compute_xM4 to P1 P2 xM2 (k) xM3 (k) P3 xM3 (k+1) Resource usage S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 18 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . General observations Parts of an architecture model can be replaced by an equivalent model that computes, during simulation, specific instants when resource usage evolves. A reduction by a factor of N leads to a simulation speed-up in the same order of magnitude. Computation depends on the characteristics of the given architecture model. The complexity of the computation method depends on the number of elements that are replaced. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 19 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . General observations Parts of an architecture model can be replaced by an equivalent model that computes, during simulation, specific instants when resource usage evolves. A reduction by a factor of N leads to a simulation speed-up in the same order of magnitude. Computation depends on the characteristics of the given architecture model. The complexity of the computation method depends on the number of elements that are replaced. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 19 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . General observations Parts of an architecture model can be replaced by an equivalent model that computes, during simulation, specific instants when resource usage evolves. A reduction by a factor of N leads to a simulation speed-up in the same order of magnitude. Computation depends on the characteristics of the given architecture model. The complexity of the computation method depends on the number of elements that are replaced. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 19 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . General observations Parts of an architecture model can be replaced by an equivalent model that computes, during simulation, specific instants when resource usage evolves. A reduction by a factor of N leads to a simulation speed-up in the same order of magnitude. Computation depends on the characteristics of the given architecture model. The complexity of the computation method depends on the number of elements that are replaced. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 19 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . More about discrete event systems Systems which evolution is based on two main properties: synchronization and concurrency. Evolution captured using two formalisms: timed automata or Petri nets. ts xM1 (0) xM2 (0) xM3 (0) xM4 (0) xM5 (0) Ti1 (0) Tj1 (0) Ti2 (0) Ti3 (0) Tj3 (0) Ti1 (1) xM1 (1) xM2 (1) xM6 (0) Ti4 (0) Tj1 Ti1 Ti2 Ti3 Tj3 Ti4 u xM1 xM2 xM4 xM5 xM6 xM3 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 20 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Algebraic description of discrete event systems Convenient expression of evolution instants using the (max, plus) algebra [18]. Algebraic framework based on two operators: maximization, ⊕, and addition, ⊗. { xM2(k) = max(T1(k) + xM1(k), xM3(k − 1)) xM3(k) = T2(k) + xM2(k) becomes { xM2(k) = T1(k) ⊗ xM1(k) ⊕ xM3(k − 1) xM3(k) = T2(k) ⊗ xM2(k) Allows linear and non linear state equations to be formed: { X(k) = f (X, U) Y (k) = g(X, U) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 21 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Illustration Simulation time ts P1 P2 Resource usage u(0) xM2 (0) xM3 (0) xM4 (0) xM5 (0) Ti1 (0) Tj1 (0) Ti2 (0) Ti3 (0) Tj3 (0) Ti1 (1) u(1) xM2 (1) y(0) Ti4 (0) F1: /execute() F1: /execute() F2: /execute() F3: /execute() F3: /execute() F4: /execute() F1: /execute() M1 M2 M3 M4 M1 M5 M2 M6 F1: /execute() F1 F3 F2 M1 M2 M4 M3 M5 Functional architecture Platform P1 P2 Node Mapping F4 Fi M6 Fo Set of equations: { X(k) = A(k, 0)X(k) ⊕ A(k, 1)X(k − 1) Y (k) = C(k, 0)X(k) Achieved simulation speed-up: ×2.33, with preserved accuracy. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 22 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Illustration F1 F3 F2 M1 M2 M4 M3 M5 Functional architecture Platform P1 P2 Node Mapping F4 Fi M6 Fo Observation time to P1 P2 u(0) xM2 (0) xM3 (0) xM4 (0) xM5 (0) Ti1 (0) Tj1 (0) Ti2 (0) Ti3 (0) Tj3 (0) Ti1 (1) u(1) xM2 (1) y(0) Ti4 (0) M1 u(0) u(1) Simulation time ts M1 Ty (0) Ty (1) M6 y(0) /Compute_y(); /Compute_y(); Equivalent model Set of equations: { X(k) = A(k, 0)X(k) ⊕ A(k, 1)X(k − 1) Y (k) = C(k, 0)X(k) Achieved simulation speed-up: ×2.33, with preserved accuracy. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 22 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Extension to the general case Definition of executable state-based models. Based on a set of equations related to the evolution instants of architecture elements. Use of an executable model that expresses dependencies with external elements. X(k)=f(X,U) Y(k)=g(X,U) Simulation time ts u1 (k)u1 (k+1)uNu (k) y1 (k) yNy (k) y1 (k+1) State-based model Instantaneous computations S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 23 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Evaluation method Comparison between architecture models simulated using the trace-driven approach and equivalent state-based models. Comparison of accuracy and simulation time. Use of the Intel CoFluent Studio modelling framework and the SystemC simulation kernel. Analysis of different kinds of architectures with different numbers of simulation events saved. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 24 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Evaluation of the approach Evaluation of achieved simulation speed-up for different ratios of saved events. Simulation speed-up Ratio of event saved (%) 0 2 4 6 8 10 12 0 10 20 30 40 50 60 70 80 90 100 (11) (20) (29) (38) (47) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 25 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Evaluation of the approach Evaluation of the computation method complexity on achieved simulation speed-up. 0 2 4 6 8 10 12 1 10 100 1000 X size: 6 X size: 10 X size: 20 X size: 30 Number of instants Simulation speed-up (*) 10000 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 26 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Evaluation of the approach Evaluation of the computation method complexity on achieved simulation speed-up. Simulation speed-up Number of instants 0 10 20 30 40 50 60 70 80 0 50 100 150 200 250 300 350 400 450 Measured speed-up Theoretical speed-up S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 27 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Synthesis The compromise between simulation speed and accuracy can be improved in many significant cases using the proposed approach. The best simulation speed-up achieved is a factor of 30 with no loss of accuracy. The presented approach is applicable for different kind of architecture models. Possibility to automate the creation process of state equations. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 28 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Implementation of the state equations Introduction of temporal dependency graphs for implementation of equations. In case of non linear set of equations, additional control statements are required. The complexity of the computation method is related to the size of the graph. Ti1 (k) Tj1 (k) Ti2 (k) Tj3 (k) e e e Ti3 (k) xM1 (k) xM2 (k) xM3 (k) xM4 (k-1) xM5 (k-1) xM5 (k) xM4 (k) xM6 (k) Ti4 (k) xM6 (k-1) e e e u(k) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 29 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Generator tool Temporal dependency graph description Ti1 Tj1 Ti2 Tj3 e e e Ti3 xM1 (k) xM2 (k) xM3 (k) xM4 (k-1)xM5 (k-1) xM5 (k) xM4 (k) xM6 (k) Ti4 xM6 (k-1) e e e u(k) Application relation analysis Application behaviour analysis Selected elements of the architecture description Platform concurrency analysis Mapping analysis Identification of evolution instants Definition of graph nodes (i) Definition of graph arcs (ii) Identification of temporal dependencies Identification of durations Definition of graph arcs’ weights (iv) Identification of evolution instants and temporal dependencies Definition of graph nodes and arcs (iii) xM1 (k) xM2 (k) xM3 (k) xM4 (k-1)xM5 (k-1) xM5 (k) xM4 (k) xM6 (k) xM6 (k-1) u(k) xM1 (k) xM2 (k) xM3 (k) xM4 (k-1)xM5 (k-1) xM5 (k) xM4 (k) xM6 (k) xM6 (k-1) u(k) xM1 (k) xM2 (k) xM3 (k) xM4 (k-1)xM5 (k-1) xM5 (k) xM4 (k) xM6 (k) xM6 (k-1) u(k) (i) (ii) (iii) (iv) Model to text transformation process S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 30 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Case study Receiver part of the LTE physical layer. Evaluation of the processing resources’ usage over time. Evaluation of 3 different mappings. OFDM demodulator Equalizer Channel estimator Symbol demapper Turbo decoder Transport block reassembly Source Sink P1: specialized processor P2: dedicated hardware resource Functional architecture Mapping Platform N M1 M2 M3 M4 M5 M6 M7 M8 S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 31 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Case study Achieved simulation speed-up by a factor of 4 with preserved accuracy. The related temporal dependency graph is made of 11 nodes. Non linear set of equations is implemented using the proposed approach. 8 Computational complexity per time unit (GOPS) Computational complexity per time unit (GOPS) 4 150 75 u(0) y(0) u(14) 0 200 400 600 800 1000 0 200 400 600 800 1000 0 u(1) u(2) u(3) u(4) u(5) u(6) u(7) u(8) u(9) u(10)u(11)u(12)u(13) y(1) y(2) y(3) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 32 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Presentation schedule . . . 1 Context of the study . . . 2 Addressed topic . . . 3 Proposal and results . . . 4 Opened prospects . . . 5 Sum-up and conclusion S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 33 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Extension of the proposed approach Influence of dynamic scheduling and arbitration policies. Influence of possible preemption of communication and processing resources. F1 F3 F2 M1 M2 M4 M3 M5 Platform P1 P2 N Mapping F4 F0 M6 Platform properties: component attributes Functional architecture model scheduler S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 34 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Improvement of the modelling process The proposed approach leads to the definition of a generic execution model. Significant reduction of the modelling effort can be considered by using this execution model. F1 F3 F2 M1 M2 M4 M3 M5 Functional architecture Plate-forme P1 P2 Node Allocation F4 Fi M6 Fo State-based model Ty u wy y Ti1 Tj1 Ti2 Tj3 e e e Ti3 xM1 (k) xM2 (k) xM3 (k) xM4 (k-1)xM5 (k-1) xM5 (k) xM4 (k) y(k) Ti4 y(k-1) e e e u(k) S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 35 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Refinement approach of performance models About the needs of methodology... Behaviour Object / Data Activity S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 36 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Refinement approach of performance models About the needs of methodology... Behaviour Object / Data Activity S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 36 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Refinement approach of performance models About the needs of methodology... Behaviour Object / Data Activity How to facilitate creation of efficient performance models ? S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 36 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Refinement approach of performance models About the needs of methodology... Behaviour Object / Data Activity How to facilitate creation of efficient performance models ? How to facilitate the refinement process of performance models ? S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 36 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . Presentation sum-up Presentation of an approach to improve the compromise between simulation speed and accuracy in performance models of embedded system architectures. Originality of the approach is related to the combination between simulation and formal models. Proposal of a new automatic generation approach of efficient executable models. It allows performance models of architectures to be automatically abstracted and more complex architectures to be addressed. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 37 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . References I [1] R. Dömer, A. Gerstlauer, J. Peng, D. Shin, L. Cai, H. Yu, S. Abdi, and D. Gajski, “System-on-chip environment: A specc-based framework for heterogeneous mpsoc design,” EURASIP Journal on Embedded Systems, vol. 2008, 2008. [2] A. D. Pimentel, C. Erbas, and S. Polstra, “A systematic approach to exploring embedded system architectures at multiple abstraction levels,” IEEE Transaction on Computers, vol. 55, 2006. [3] C. Haubelt, J. Kalk, J. Keinert, T. Schlichter, M. Streubühr, A. Deyhle, A. Hadert, and J. Teich, “A systemc-based design methodology for digital signal processing systems,” EURASIP Journal on Embedded Systems, vol. 2007, 2007. [4] F. Balarin, Y. Watanabe, H. Hsieh, L. Lavagno, C. Passerone, and A. Sangiovanni-Vincentelli, “Metropolis: an integrated electronic system design environment,” Computer, vol. 36, pp. 45–52, April 2003. [5] T. Arpinen, E. Salminen, T. D. Hämäläinen, and M. Hännikäinen, “Performance evaluation of uml-2modeled embedded streaming applications with system-level simulation,” EURASIP Journal on Embedded Systems, vol. 2009, 2009. [6] J. Kreku, M. Hoppari, T. Kestilä, Y. Qu, J. Soininen, P. Andersson, and K. Tiensyrjä, “Combining uml2 application and systemc platform modelling for performance evaluation of real-time embedded systems,” EURASIP Journal on Embedded Systems, vol. 2008, pp. 6:1–6:18, jan 2008. [7] P. Bourgos, A. Basu, M. Bozga, S. Bensalem, J. Sifakis, and K. Huang, “Rigorous system level modeling and analysis of mixed hw/sw systems,” in IEEE/ACM International conference on Forma methods and models for codesign (MEMOCODE), 2011. [8] SpaceCodesign. Space studio. [Online]. Available: http://www.spacecodesign.com [9] Expermeta. [Online]. Available: http://www.expermeta.com [10] Mirabilis. Mirabilis visualsim. [Online]. Available: http://www.mirabilisdesign.com [11] Intel. Intel cofluent studio. [Online]. Available: http://www.intel.com/content/www/us/en/cofluent/intel-cofluent-studio.html S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 38 / 39

. . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . .. . . . .. . . . . .. . . . .. . . . . .. . . . .. . . . .. . References II [12] G. Beltrame, D. Sciuto, and C. Silvano, “Multi-accuracy power and performance transaction-level modeling,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, 2007. [13] M. Radetzki and R. Salimi-Khaligh, “Accuracy-adaptive simulation of transaction level models,” in Design, Automation and Test in Europe (DATE), 2008. [14] G. Schirner and R. Dömer, “Result-oriented modeling - a novel technique for fast and accurate tlm,” IEEE Transactions on computer-aided design of integrated circuits and systems, vol. 26, no. 9, pp. 1688–1699, September 2007. [15] S. Stattelmann, O. Bringmann, and W. Rosenstiel, “Fast and accurate resource conflict simulation for performance analysis of multi-core systems,” in Proc. Design, Automation and Test in Europe (DATE’11), 2011. [16] S. Künzli, F. Poletti, L. Benini, and L. Thiele, “Combining simulation and formal methods for system-level performance analysis,” in Proc. Design, Automation and Test in Europe (DATE’06), 2006. [17] K. Lu, D. Muller-Gritschneder, and U. Schlichtmann, “Analytical timing estimation for temporally decoupled tlms considering resource conflicts,” in Proc. Design, Automation and Test in Europe (DATE’13), 2013. [18] F. Baccelli, G. Cohen, G. Olsder, and J. Quadrat, Synchronization and linearity, an algebra for discrete event systems. New York: Wiley & Sons Ltd, 1992. S. Le Nours (Univ. Nantes, FR) Generation of executable state-based models February 6, 2014 39 / 39