Slide 71
Slide 71 text
71
Intel 8051 (MCS51)
A51 Assembler / A251 Assembler 195
† New features in the A251 assembler and the MCS 251 architecture
A
8051 Microcontroller Instructions
Binary
Mode
0 1 2 3 4 5 6 - 7 8 - F
Source
Mode
0 1 2 3 4 5 A5x6-
A5x7
A5x8-A5xF
0 NOP AJMP
adr11
LJMP
ADR16
RR
A
INC
A
INC
dir
INC
@Ri
INC
Rn
1 JBC
bit,rel
ACALL
adr11
LCALL
adr16
RRC
A
DEC
A
DEC
dir
DEC
@Ri
DEC
Rn
2 JB
bit,rel
AJMP
adr11
RET RL
A
ADD
A,#data
ADD
A,dir
ADD
A,@Ri
ADD
A,Rn
3 JNB
bit,rel
ACALL
adr11
RETI RLC
A
ADDC
A,#data
ADDC
A,dir
ADDC
A,@Ri
ADDC
A,Rn
4 JC
rel
AJMP
adr11
ORL
dir,A
ORL
dir,#data
ORL
A,#data
ORL
A,dir
ORL
A,@Ri
ORL
A,Rn
5 JNC
rel
ACALL
adr11
ANL
dir,A
ANL
dir,#data
ANL
A,#data
ANL
A,dir
ANL
A,@Ri
ANL
A,Rn
6 JZ
rel
AJMP
adr11
XRL
dir,A
XRL
dir,#data
XRL
A,#data
XRL
A,dir
XRL
A,@Ri
XRL
A,Rn
7 JNZ
rel
ACALL
adr11
ORL
c,bit
JMP
@A+DPTR
MOV
A,#data
MOV
dir,#data
MOV
@Ri,#data
MOV
Rn,#data
8 SJMP
rel
AJMP
adr11
ANL
C,bit
MOVC
A,@A+DPTR
DIV
AB
MOV
dir,dir
MOV
dir,@Ri
MOV
dir,Rn
9 MOV
DPTR,#d16
ACALL
adr11
MOV
bit,c
MOVC
A,@A+DPTR
SUBB
A,#data
SUBB
A,dir
SUBB
A,@Ri
SUBB
A,Rn
A ORL
C,/bit
AJMP
adr11
MOV
C,bit
INC
DPTR
MUL
AB
ESC MOV
@Ri,dir
MOV
Rn,dir
B ANL
C,/bit
ACALL
adr11
CPL
bit
CPL
C
CJNE
A,#d8,rel
CJNE
A,dir,rel
CJNE
@Ri,#d8,rel
CJNE
Rn,#d8,rel
C PUSH
dir
AJMP
adr11
CLR
bit
CLR
C
SWAP
A
XCH
A,dir
XCH
A,@Ri
XCH
A,Rn
D POP
dir
ACALL
adr11
SETB
bit
SETB
C
DA
A
DJNZ
dir,rel
XCHD
A,@Ri
DJNZ
Rn,rel
E MOVX
A,@DPTR
AJMP
adr11
MOVX
A,@Ri
CLR
A
MOV
A,dir
MOV
A,@Ri
MOV
A,Rn
F MOV
@DPTR,A
ACALL
adr11
MOVX
@Ri,A
CPL
A
MOV
dir,A
MOV
@Ri,A
MOV
Rn,A
URL
A51 Assembler