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Lecture #5 FET Biasing & AC Analysis Instructor: Dr. Ahmad El-Banna November 2014 J-601-1448 Electronic Principals Integrated Technical Education Cluster At AlAmeeria‎ © Ahmad El-Banna

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Agenda 2 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna Construction and Characteristics FET Biasing Design and Troubleshooting JFET small signal Model FET Amplifier Networks Practical Applications Note! Same concepts of the BJT, so we will just overview the FET transistors.

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CONSTRUCTION AND CHARACTERISTICS 3 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Construction 4 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna • One of the most important characteristics of the FET is its high input impedance. • FETs are more temperature stable than BJTs, and FETs are usually smaller than BJTs, making them particularly useful in integrated-circuit (IC) chips.

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Construction.. 5 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna N-channel

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Characteristics & Equations 6 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Depletion-Type MOSFET 7 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna • There is no direct electrical connection between the gate terminal and the channel of a MOSFET. • It is the insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable high input impedance of the device.

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Depletion-Type MOSFET 8 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Other MOSFETS 9 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna • VMOS AND UMOS POWER MOSFETs • CMOS • MESFET

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FET BIASING 10 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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FIXED-BIAS CONFIGURATION 11 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Example 12 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Voltage-Divider Bias 13 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Example 14 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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DESIGN AND TROUBLESHOOTING 15 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Design Example 16 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Troubleshooting 17 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna The level of VDS is typically between 25% and 75% of VDD . The continuity of a network can be checked simply by measuring the voltage across any resistor of the network.

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JFET SMALL SIGNAL MODEL 18 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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JFET small signal Model 19 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Fixed-Bias Configuration 20 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna phase shift of 180° between input and output voltages.

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VOLTAGE-DIVIDER CONFIGURATION 21 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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FET AMPLIFIER NETWORKS 22 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Design FET Amplifier Network 23 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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24 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna Summary Table

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25 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Cascaded Configuration 26 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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PRACTICAL APPLICATIONS 27 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Three-Channel Audio Mixer 28 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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Motion Detection System 29 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna

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• For more details, refer to: • Chapter 6,7,8, Electronic Devices and Circuits, Boylestad. • The lecture is available online at: • https://speakerdeck.com/ahmad_elbanna • For inquires, send to: • ahmad.elbanna@feng.bu.edu.eg 30 J-601-1448 , Lec#5 , Nov 2014 © Ahmad El-Banna