Implementing ARC: For Fun, Not Profit

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arc Adaptive Replacement Cache: for fun, not proﬁt @markhibberd

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“Yea, from the table of my memory, I'll wipe away all trivial fond records” William Shakespeare - Hamlet, Act I, Scene IV

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“We are therefore forced to recognize the possibility of constructing a hierarchy of memories, each of which has greater capacity than the preceding but which is less quickly accessible.” A. W. Burks, H. H. Goldstine, J. von Neumann: - Preliminary Discussion of the Logical Design of Electronic Computing Instrument, Part I, Vol. I, Report prepared for the U.S. Army Ord. Dept.

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( http://static.googleusercontent.com/media/research.google.com/en//people/jeff/stanford-295-talk.pdf )

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Reliable Storage

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Ephemeral Computation

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Lazy Replication w/ Disk and Network Cache

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Durable / Replicated Intent Log

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GET /user/1 { “user” : “ocelot” }

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GET /user/1 { “user” : “ocelot” }

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GET /user/1 { “user” : “ocelot” }

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A cache perhaps?

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LRU A “default” choice Constant time and space complexity *very bad* in the face of scans

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LFU Often better hit ratio Logarithmic time complexity resilient to scans

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Hybrid LRU + LFU Lots of attempts Most have logarithmic time complexity *very bad* for general purpose (tuning)

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ARC Combines frequency and recency in the most optimal way for routing money from your pocket to

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ARC Exploits frequency and recency Constant time and space complexity Self tuning, good for general purpose

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L1: recency - keys were seen at least once recently L1 L2 ARC

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L1: recency - keys were seen at least once recently L1 L2 MRU LRU ARC

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L2: frequency - keys were seen at least twice recently L1 L2 MRU LRU ARC

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L2: frequency - keys were seen at least twice recently L1 L2 MRU LRU LRU MRU ARC

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T1: Cached keys in L1 L1 L2 T1 MRU LRU LRU MRU ARC

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B1: Tracked (but not cached) keys in L1 L1 L2 MRU LRU LRU MRU T1 B1 ARC

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L1 L2 MRU LRU LRU MRU T1 B1 T2 T2: Cached keys in L2 ARC

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B2: Tracked (but not cached) keys in L2 L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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1. If we get a hit in T1 or T2 do nothing L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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2. If we get a hit in B1 increase size of T1 L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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2. If we get a hit in B1 increase size of T1 L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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3. If we get a hit in B2 decrease size of T1 L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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3. If we get a hit in B2 decrease size of T1 L1 L2 MRU LRU LRU MRU T1 B1 T2 B2 ARC

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ARC This is interesting because… It is relatively easy to understand Basically LRU with an extra directory Easy to adapt LRU like algorithms ( https://dl.dropboxusercontent.com/u/91714474/Papers/oneup.pdf )

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L2 ARC

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L2 ARC ARC L2 ARC L2 ARC NETWORK

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Update L2 ARC

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Update L2 ARC Respond & Update ARC

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Update L2 ARC Respond & Update ARC

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L2 ARC: Challenges This doesn’t work If not careful about updating L2 ARC can bottleneck reads everywhere

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Update L2 ARC Respond & Update ARC

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond Respond & Update ARC

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Queue Respond & Update ARC WRITE

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Queue Respond & Update ARC WRITE Async L2 ARC update

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L2 ARC ARC L2 ARC GET /user/1 L2 ARC NETWORK ARC Miss L2 ARC Miss Respond & Queue Respond & Update ARC WRITE Async L2 ARC update Very prepared to drop L2 updates on the floor

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Results

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Results Lack of properly implemented LRU caches in Haskell

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Results

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Results https://themonadreader.files.wordpress.com/2010/05/issue16.pdf

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Cribbed Results ( http://www.cs.cmu.edu/~15-440/READINGS/megiddo-computer2004.pdf )

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Cribbed Results ( http://www.cs.cmu.edu/~15-440/READINGS/megiddo-computer2004.pdf )

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