Slide 41
Slide 41 text
ͦͷଞجຊ໋ྩ
fn op(&mut self, ir: u32) {
// ...লུ
let v = match (ir >> 12) & 7 {
0b000 if reg && (ir & 0x4000_0000) != 0 => rs1.wrapping_sub(rs2),
0b000 => rs1.wrapping_add(rs2),
0b001 => rs1 << (rs2 & 0x1f),
0b010 => ((rs1 as i32) < (rs2 as i32)) as u32,
0b011 => (rs1 < rs2) as u32,
0b100 => rs1 ^ rs2,
0b101 if (ir & 0x40000000) != 0 => ((rs1 as i32) >> (rs2 & 0x1f)) as u32,
0b101 => rs1 >> (rs2 & 0x1f),
0b110 => rs1 | rs2,
0b111 => rs1 & rs2,
_ => {
self.record_exception(Exception::IllegalInstruction, ir);
0
}
};
self.write_back(rd, v)
}