Slide 18
Slide 18 text
ALU (Chisel)
class ALU extends Module {
val io = new ALUIO
…
def reverseBit(v: Bits): UInt = Cat(
v(0), v(1), v(2), v(3), v(4), v(5), v(6), v(7), v(8), v(9),
v(10), v(11), v(12), v(13), v(14), v(15), v(16), v(17), v(18),
v(19), v(20), v(21), v(22), v(23), v(24), v(25), v(26), v
(27), v(28), v(29), v(30), v(31))
val out =
Mux(io.fn === FN_ADD || io.fn === FN_SUB, sum,
Mux(io.fn === FN_SR || io.fn === FN_SRA, shout_r,
Mux(io.fn === FN_SL, shout_l,
Mux(io.fn === FN_AND, io.in1 & io.in2,
Mux(io.fn === FN_OR, io.in1 | io.in2,
Mux(io.fn === FN_XOR, io.in1 ^ io.in2,
Mux(io.fn === FN_REVERSE, reverseBit(io.in1),
cmp)))))))
}
object XDecode extends DecodeConstants
{
val table = Array(
…
ADDI-> List(Y, N,N,N,N,N,N,Y,A2_IMM, A1_RS1,
IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,CSR.N,
N,N,N,N,N,N),
REVERSE -> List(Y, N,N,N,N,N,N,Y,A2_IMM, A1_RS1,
IMM_I, DW_XPR,FN_REVERSE,N,M_X, MT_X, N,N,Y,
CSR.N,N,N,N,N,N,N),
…
)