Upgrade to Pro
— share decks privately, control downloads, hide ads and more …
Speaker Deck
Features
Speaker Deck
PRO
Sign in
Sign up for free
Search
Search
Useful Tools for Hardware Design
Search
dppa1008
April 30, 2020
0
1.6k
Useful Tools for Hardware Design
dppa1008
April 30, 2020
Tweet
Share
More Decks by dppa1008
See All by dppa1008
Testbench
dppa1008
0
1.5k
Simple Makefile
dppa1008
0
1.5k
Simple nWave
dppa1008
0
1.5k
nWave compressed
dppa1008
0
26
Verlilog Lab 1 Tutorial
dppa1008
0
2.2k
Lab 1 example
dppa1008
0
2.1k
Featured
See All Featured
The Success of Rails: Ensuring Growth for the Next 100 Years
eileencodes
47
7.9k
Context Engineering - Making Every Token Count
addyosmani
9
580
Java REST API Framework Comparison - PWX 2021
mraible
34
9.1k
Leveraging Curiosity to Care for An Aging Population
cassininazir
1
140
[RailsConf 2023 Opening Keynote] The Magic of Rails
eileencodes
31
9.8k
Mobile First: as difficult as doing things right
swwweet
225
10k
Game over? The fight for quality and originality in the time of robots
wayneb77
1
73
The agentic SEO stack - context over prompts
schlessera
0
580
The Language of Interfaces
destraynor
162
26k
Typedesign – Prime Four
hannesfritz
42
2.9k
Designing for Performance
lara
610
70k
Mozcon NYC 2025: Stop Losing SEO Traffic
samtorres
0
100
Transcript
Useful Tools Kai-Chen Lin Logic Design 2020 Prof. Wai Kei
Mak
Outline • Testbench • Makefile • nWave • Assignment 4
- 2
Correct Download templates Design circuits and tbs Upload files and
makefile Login to server and choose a server node Use makefile to execute ncverilog Debuging tools: nWave, $display Submit to ILMS Wrong Design Flow
Testbench Suppose we have a Adder with 2 inputs and
1 output … Input [32:0] A, B; Output [32:0] Y;
Testbench 1. Declare a tb
Testbench 1. Declare a tb
Testbench 2.Setup for waveform
Testbench 2.Setup for waveform
Testbench 3.Specify the clock
3.Specify the clock
4. Feed a test case Testbench
4. Feed a test case
Testbench 4-2. Feed test cases
Testbench 4-2. Feed test cases
Testbench 5. Repeat Statement
Testbench 5. Repeat Statement
Makefile
Makefile 1. Declare Variables
Makefile 2. Declare commands
Makefile make q1 ncverilog lab2_1_tb.v lab2_1.v
Makefile
Makefile
nWave
nWave
nWave
nWave
nWave
nWave
nWave
nWave
nWave
Assignment 4 - 2