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dppa1008
April 30, 2020
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Useful Tools for Hardware Design
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April 30, 2020
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Transcript
Useful Tools Kai-Chen Lin Logic Design 2020 Prof. Wai Kei
Mak
Outline • Testbench • Makefile • nWave • Assignment 4
- 2
Correct Download templates Design circuits and tbs Upload files and
makefile Login to server and choose a server node Use makefile to execute ncverilog Debuging tools: nWave, $display Submit to ILMS Wrong Design Flow
Testbench Suppose we have a Adder with 2 inputs and
1 output … Input [32:0] A, B; Output [32:0] Y;
Testbench 1. Declare a tb
Testbench 1. Declare a tb
Testbench 2.Setup for waveform
Testbench 2.Setup for waveform
Testbench 3.Specify the clock
3.Specify the clock
4. Feed a test case Testbench
4. Feed a test case
Testbench 4-2. Feed test cases
Testbench 4-2. Feed test cases
Testbench 5. Repeat Statement
Testbench 5. Repeat Statement
Makefile
Makefile 1. Declare Variables
Makefile 2. Declare commands
Makefile make q1 ncverilog lab2_1_tb.v lab2_1.v
Makefile
Makefile
nWave
nWave
nWave
nWave
nWave
nWave
nWave
nWave
nWave
Assignment 4 - 2