A CHIP” Used in smartphones and other devices 1000x more devices in 2010 than 2000 Dynamic memory manager ARM Cortex-M4 ARM Cortex-M4 ARM Cortex-A15 MPCore (up to 2GHz) ARM Cortex-A15 MPCore (up to 2GHz) In-house HD Video accelerator Tensilica image processor array In-house 2D graphics CEVA DSP Audio proc. & analogue sub-system Multi-pipe display sub-system(DSS) Peripherals Timers, Int Controller, Mailboxes, System DMA Boot/Secure ROM, L3 RAM Network-on-chip interconnect System security technology: SHA-1/SHA-2/MD5, DES/3DES, RNG, AES, PKA, secure WDT, keys, crypto DMA PowerVR™ SGX544-MPx 3D graphics L2 cache D D D D D D D ? ? ? ? ? ? ? All of which needs to be debugged Each processor is debugged separately… HALF THE COST of developing SoC is debugging-related