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Radeco Pseudo C Code Generation

kriw
September 08, 2018

Radeco Pseudo C Code Generation

The slide of r2con2018

kriw

September 08, 2018
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  1. Radeco Pseudo C Code
    Generation
    GSoC’2018

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  2. Radeco Pseudo C Code Generation
    I have done
    - writing pseudo C Code generator
    - writing r2 integration

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  3. Projects
    - radeco-lib
    - https://github.com/radareorg/radeco-lib
    - Core library for binary analysis, decompilation
    - radeco
    - https://github.com/radareorg/radeco
    - User interface

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  4. Design (radare2 to radeco)
    Input (ESIL)

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  5. Design (radeco-lib)
    radeco has 3 stages
    - Loading Binary (ESIL)
    - Analyses
    - deadcode elimination, ...
    - Decompilation
    - heuristics
    - control flow structuring

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  6. Works
    Before GSoC After GSoC

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  7. Works
    Before GSoC After GSoC

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  8. IR
    Assembly-like intermidiate representation
    - Generated from ESIL
    - SSA form
    Example IR

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  9. C-like CFG
    - CFG with C expressions

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  10. IR to C-like CFG
    - CFG is copied from the one of
    IR No for/if/while
    - Expressions are recovered by
    expr tree
    %34 = (%30 | %31) &
    0xffffffff
    %33 = %30 | %31
    %34 = %33 & 0xffffffff

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  11. C-like CFG to Pseudo C code
    - Recover C code from CFG (with GOTOs)
    - Only recover assignments with memory reference
    - Recovered: mov [ebp - 0x1c], 0x10
    - Ignored: mov eax, 0x10

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  12. Challenges
    - Required knowledge of program/binary
    analysis
    - Sharing tasks with HMPerson1
    - Few information about decompiler

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  13. TODOs
    Milestone for Radeco-0.1
    - Bug fixes
    - API stabilization (radeco-lib)
    - Documentation
    - etc

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