Understanding CPU Microarchitecture for Performance

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March 03, 2020

Understanding CPU Microarchitecture for Performance

Microprocessors have evolved over decades to eke out performance from existing code. But the microarchitecture of the CPU leaks into the assumptions of a flat memory model, with the result that equivalent code can run significantly faster by working with, rather than fighting against, the microarchitecture of the CPU.

This talk, given at QCon London 2020, presents the microarchitecture of modern CPUs, showing how misaligned data can cause cache line false sharing, how branch prediction works and when it fails, how to read CPU specific performance monitoring counters and use that in conjunction with tools like perf and toplev to discover where bottlenecks in CPU heavy code live. We’ll use these facts to revisit performance advice on general code patterns and the things to look out for in executing systems. The talk will be language agnostic, although it will be based on the Linux/x86_64 architecture.

The presentation was recorded at QCon London 2020, and a recording is available at https://www.infoq.com/presentations/microarchitecture-modern-cpu/



March 03, 2020