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EXTENT-2017: Heterogeneous Computing Trends and Business Value Creation

EXTENT-2017: Heterogeneous Computing Trends and Business Value Creation

EXTENT-2017: Software Testing & Trading Technology Trends Conference
29 June, 2017, 10 Paternoster Square, London

Heterogeneous Computing Trends and Business Value Creation
Thayaparan Sripavan, Head of Hardware Accelerated Systems, MillenniumIT

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June 30, 2017
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  1. Fabrication Technology 0 10 20 30 40 50 60 70

    80 90 100 2006 2008 2011 2013 2016 CPU FPGA GPU Process Node (nm)
  2. Fabrication Technology 0 10 20 30 40 50 60 70

    80 90 100 2006 2008 2011 2013 2016 CPU FPGA GPU “Parity on process node!” Roadmap visibility till – 2030 (IEEE) CPU : 35x Cores FPGA : 20x Estate GPU : 50x FLOPS Process Node (nm)
  3. Evolution More Cores , Integrated Memory, I/O & Graphics… Models,

    Languages, Libs … Hard IP, Soft IP, SoC, High Level Synthesis… {Scaling / Efficiency} {Transformation} 2006 – 2016 + +
  4. Interconnects 2006 – 2016 Parity on process technology increasing interconnect

    bandwidth Interconnect latencies Synchronization overhead Source : National Instruments 8000x BW ; Latency Wall @ ~300 ns
  5. Challenges • Heterogeneous design space – Continuously Expanding Horizon •

    Constrained by interconnect speeds / synchronization – Inefficient Boundaries • Coarse-grained design partitioning – Compromises in Solutions • Deal with a mix of tools and methodologies – Complexity / Skill Specificity Heterogeneous Approach - Differentiator or Killer?
  6. Value Creation Non-Functional Enhancement Functional Enhancement Paradigm Shifts Business Model

    Transformation Legacy Heterogeneous Technology Business Model Existing New Transformation Base Constrained by Technology (Prohibitive) Constrained by Business Model (Sub-optimal) Enhancement
  7. Value Creation Non-Functional Enhancement Functional Enhancement Paradigm Shift Business Model

    Transformation Predictably high performance Space efficiency Energy efficiency
  8. Case : Real Time Market Data • Coarse – grained

    mapping to Processors • Realtime – FPGA / Rest CPU • Sub-component on FPGA • Matching scalability • Boundary inefficiency • Use case based optimization Consistent (>10x) performance at best space efficiency. • Best Execution Transparency • Open Access • Increased liquidity • Balanced Performance & Configurability
  9. The Convergence NVLink Multi-Chip P2P PCIe (PCIe 3) 3D FPGAs

    Direct Cache Access (PCIe 3) NVLink (IBM) Direct Cache Access (PCIe 3) CAPI (IBM) FPGA On-Die (Intel) P2P PCIe (PCIe 3) GPU Direct (P2P PCIe)
  10. Tackling the Challenge “Fine-Grained Modular Designs” “Dynamic / Late Mapping”

    “User Scheduled” “Domain Specific Descriptions”
  11. Value Creation Non-Functional Enhancement Functional Enhancement Paradigm Shifts Business Model

    Transformation Brute force solutions in real- time for complex problems Sensitive to emerging data & predictive analytics Deep learning, speculation & statistical processing
  12. Value Creation Non-Functional Enhancement Functional Enhancement Paradigm Shifts Business Model

    Transformation Real time visibility into risk, margin and portfolio optimization Self healing systems Technology agnostic Post-Trade Description Language (PDL)