1996 and 1998, respectively Ph.D. degree from Osaka University, Japan, in 2001 Was with Nara Institute of Science and Technology, Japan, 2001-2007 Was with Osaka University, Japan, 2007-2011 Have been with Shizuoka University, Japan, since 2011 My interests are in applications and development of CMOS image sensors for biomedical imaging and computational imaging Email: email@example.com Self Introduction
＋ Rich digital signal processing circuits Pixel array with in-pixel rich processing circuits Low-level focal-plane processing without in- pixel circuits Simple and small pixel Complicated and large pixel Post-processing Reduced data Results Results Results Conventional Charge-domain signal processing Smart pixel
al. (2016)] Add the address line +High sensitivity High resolution - Temporal constraint Share the control line +High sensitivity High resolution -Spatial constraint [Luo et al. (2019)] In-pixel shutter memory +No constraint -Lower sensitivity Lower resolution
something with something Moving something down Real Input Model Top 1 Top 3 Top 5 Video (upper bound) C3D 71.0 88.0 88.0 Single image Coded exposure (Proposed) SVC2D 72.0 84.0 88.0 Long exposure C2D 20.0 40.0 52.0 Short exposure C2D 21.0 47.0 60.0 Courtesy of Prof. Nagahara, Osaka Univ. Video Compressed Covering something with something Moving something down
processing is introduced to compress temporal optical signals. Temporally compressive ultra-high-speed CMOS image sensor based on the inner-product operation has been fabricated. Single-shot filming and multi-exposure-based transient imaging have been demonstrated at a burst frame rate of 303Mfps. Extended depth range and separation of dual-path components have been demonstrated. Applications of DNN such as one-path image reproduction and motion recognition from a compressed image were introduced. Summary
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