LinuxカーネルのFPGAサブシステム

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1. FPGASubsysteminLinuxKernel January 15, 2023 Kernel/VM ୳ݕୂ online part6 Online / Video Streaming Masanori Ogino
2. . .. .. .. . INTRO. . . ARCH. . . CLOSING $ whoami • ௕࡚ݝग़਎ • ඇৗۈݚڀһ • Funtoo LinuxɺNixOSɺOpenBSD • ৘ใཧ࿦ɺܗࣜݴޠɺίϯϐϡʔλʔΞʔΩςΫνϟ աڈͷ Kernel/VM ʹ͓͚Δൃද • Rust ೖ໳ҎલʢୈेճɹΧʔωϧʗ VM ୳ݕୂɺ2014 ೥ʣ • Portable Driver Architecture (PDA) ͰϢʔβۭؒ PCI σόΠε υϥΠόʢΧʔωϧ/VM ୳ݕୂ @ ؔ੢ 8 ճ໨ɺ2017 ೥ʣ
3. . .. .. .. . INTRO. . . ARCH. . . CLOSING Ξ΢τϥΠϯ ͸͡Ίʹ FPGA αϒγεςϜͷΞʔΩςΫνϟ ͓ΘΓʹ
4. . .. .. .. . INTRO. . . ARCH. . . CLOSING FPGA ͱ൚༻ CPU ͢΂ͯͷॲཧΛ FPGA ʹ࣮૷ͨ͘͠ͳ͍ʂ طଘιϑτ΢ΣΞΛ FPGA ͱ૊Έ߹Θ͍ͤͨʂ • FPGA ͱ CPU ΛόεͰ઀ଓ • FPGA ্ʹ CPU Λ࣮૷ʢιϑτίΞʣ • FPGA ͱ CPU ΛͻͱͭͷύοέʔδʹʢSoCʣ CPU: Central Processing Unit; FPGA: Field Programmable Gate Array; SoC: System on Chip
5. . .. .. .. . INTRO. . . ARCH. . . CLOSING FPGA ౥ࡌ SoC ͷൃల • Atmelʢݱ MicrochipʣFPSLICʢ1999ʣ AVR • Actelʢݱ MicrosemiʣSmartFusionʢ2010ʣ ARM Cortex-M3 • Xilinxʢݱ AMDʣZynq-7000ʢ2012ʣ ARM Cortex-A9 • Alteraʢݱ IntelʣCyclone V SoCʢ2014ʣ ARM Cortex-A9 • Intel Xeon SP with integrated FPGAʢ2019ʣ Intel Skylake FPSLIC: Field Programmable System Level Integrated Circuit; SBC: Single Board Computer; SP: Scalable Processor
6. . .. .. .. . INTRO. . . ARCH. . . CLOSING Linux Χʔωϧͷ FPGA αϒγεςϜ FPGA Λ੍ޚ͢Δϕϯμʔதཱͳ࢓૊Έ • “[RFC PATCH 0/1] FPGA subsystem core” (2013) https://lore.kernel.org/all/cover.1379519753.git.michal.simek@xilinx.com/ • “[PATCH v11 0/4] FPGA Manager Framework” (2015) https://lore.kernel.org/lkml/1442935271-10375-1-git-send-email-atull@opensource.altera.com/ • “[PATCH v21 0/9] Device Tree support for FPGA Programming” (2016) https://lore.kernel.org/lkml/20161025145540.3722-1-atull@opensource.altera.com/
7. . .. .. .. . INTRO. . . ARCH. . . CLOSING FPGA αϒγεςϜͷن໛ Language Files Lines Code Comments Blanks C 38 16890 11630 2309 2951 C Header 4 759 417 246 96 Makefile 1 55 35 11 9 Total 43 17704 12082 2566 3056 ʢLinux 6.1ɺtokei 12.1.2 Ͱଌఆʣ
8. . .. .. .. . INTRO. . . ARCH. . . CLOSING FPGA αϒγεςϜͷߏ੒ཁૉ • FPGA Ϛωʔδϟʔ FPGA ΛϓϩάϥϜ͢ΔΠϯλʔϑΣʔε • FPGA ϒϦοδ FPGA ΛϓϩάϥϜ͢ΔલޙʹόεΛ੍ޚ • FPGA Ϧʔδϣϯ FPGA Ϛωʔδϟʔͱ FPGA ϒϦοδͷϥούʔ
9. . .. .. .. . INTRO. . . ARCH. . . CLOSING ͓ΘΓʹ Thank you for your participation!