2nd Phase : Continuous Integration for Hardware Projects on LibreCores CI

https://youtu.be/HlENuZZq7zc?t=2495

1. Continuous Integration for Hardware Projects on LibreCores CI Librecores Free and Open Digital Hardware
2. • FOSSi Foundation is a non-profit foundation • Mission : Promote and assist free and open digital hardware designs and their related ecosystems. • Operates as an open, inclusive, vendor-independent group. • https://fossi-foundation.org/
3. • Librecores CI is an approach/service to provide continuous integration to hardware projects • Provide automation service ◦ Currently setting up demo flow for OpenRISC ◦ Will target more in future ( beyond GSoC ) • Powered by Jenkins. https://www.librecores.org/static/librecores-ci
4. Why Jenkins? • Free and open-source project. • It’s a framework • Self-hosted setup ◦ E.g. remote build agents • Features we need ◦ Multi-branch pipeline ◦ Tool management plugins ◦ General purpose plugins ◦ Security and shared access engines • Success Stories in this area
6. Deliverables Setup demo CI Flow for mor1kx (openrisc project) • Modifying & optimising mor1k Travis CI flow to use Librecores-CI docker image • Create Jenkinsfile in OpenRISC projects . • Create CI for Yosys synthesis • Creating CI for OpenOCD/GDB • Extending Jenkinsfile in mor1kx (to make Yosys and OpenOCD/GDB part of the build pipeline)
7. Free and open RISC instruction set architecture with DSP features Create a free and open processor for embedded systems ( https://openrisc.io/ ) Set of free, open source implementations of the architecture Complete set of free, open source software development tools, libraries, operating systems and applications OpenRISC https://openrisc.io/
8. • Detach reusable logic to https://github.com/librecores/librecores-pipeline-lib • Add support for email notifications from the instance • Parsing and visualizing test reports for mor1kx. ( Jenkins plugins ) • Add a fusesoc configuration option to Librecores pipeline library for automatic configuration of fusesoc based projects. ◦ A project can simply call `lcci.fusesoc()` in its Jenkinsfile and the fusesoc based projects will be automatically configured.
9. mor1kx (openrisc project ) pipeline or1k-marocchino (openrisc project) pipeline Achieved : Multiple pipelines in OpenRISC Projects
10. • Yosys is a framework for Verilog RTL synthesis. • Fusesoc : The icestorm backend uses yosys to handle synthesis, arachne-pnr for place & route and icepack for creating the bitstream • Command used in mor1kx to only run synthesis in the icestorm backend by setting pnr to none : ◦ fusesoc run --target=tinyfpga_bx mor1k --pnr=none Yosys Synthesis
11. Modifying mor1kx.core : fusesoc (icestorm tool build) tinyfpga_bx: default_tool : icestorm filesets : [core, tinyfpga_bx] tools: icestorm: nextpnr_options : [--lp8k, --pcf-allow-unconstrained, --package, cm81, --freq, 32] pnr: next toplevel : mor1kx
12. yosys.log in mor1kx
13. Quick Start fusesoc library add mor1kx ../mor1kxg fusesoc run --target=tinyfpga_bx mor1kx --pnr=none ./extract_stats.py < build/mor1kx_5.0-r3/tinyfpga_bx-icestorm/yosys.log Result ( After extracting printing statistics from log file ) mor1kx git:(yosys-ci) ✗ ./extract_stats.py < build/mor1kx_5.0-r3/tinyfpga_bx-icestorm/yosys.log [('wires', '5578'), ('memories', '0'), ('processes', '0'), ('cells', '7310')] [('SB_CARRY', '426'), ('SB_DFF', '166'), ('SB_DFFE', '885'), ('SB_DFFESR', '569'), ('SB_DFFESS', '13'), ('SB_DFFSR', '56'), ('SB_DFFSS', '2'), ('SB_LUT4', '5182'), ('SB_RAM40_4K', '11')] WIP : Use the result generated to display graphs for test results / synthesis with Jenkins plugins
14. WIP : Parsing and visualizing test reports for mor1kx Tap Plugin : To be used for test results of openrisc projects Performance Plugin : To be used for for synthesis and PnR metrics (e.g. used LUTs)
15. Discussions : • Chat : ◦ https://gitter.im/librecores/librecores-ci • Mailing List : ◦ discussion@lists.librecores.org ◦ openrisc@lists.librecores.org Github : hw Blog Posts : http://nancychauhan.in/stories/2019/06/08/gsoc-week1_2/ http://nancychauhan.in/stories/2019/06/28/gsoc-week3_4/ Some Useful Links
16. A big thanks to my mentors Oleg Nenashev, Stafford Horne, Stefan Wallentowitz and fossi foundation !