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Unifabrix - IT Press Tour #49 March 2023

Unifabrix - IT Press Tour #49 March 2023

The IT Press Tour

April 01, 2023

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  1. 2 © UnifabriX 2023 | Proprietary and Confidential From the

    people who created the IPU and pioneered with CXL from its early inception as FlexBus and IAL. Proven track record in datacenter system architectures and high-performance data fabrics, across disciplines of Compute, Memory, Storage, Networking and Acceleration. Lior Handelsman Tomer Goldberg Yuval Bachar Eli Tiomkin Board of directors Board of directors Advisory board Advisory board VP R&D Eitan Solomon CEO CTO Ronen Hyatt Danny Volkind CBO Micha Risling VP Product Eran Rippel 20230328 IT Press Tour Leadership
  2. Located in the heart of Israel’s Silicon Valley, next to

    Haifa Scientific Park, within reach to significant pool of R&D talent, software & silicon, home to major global players including: • Intel • Apple • Qualcomm • AWS/Annapurna • Microsoft Azure software & silicon • NVIDIA/Mellanox • Google • Marvell • Dell/EMC • IBM and more UnifabriX R&D Talent Ecosystem Apparently, DRAM is a roadblock to scaling Compute. UnifabriX Scientific Park Office UnifabriX Downtown Innovation Park Office 3 © UnifabriX 2023 | Proprietary and Confidential 20230328 IT Press Tour
  3. The problem DRAM is a roadblock to scaling Compute. ©

    UnifabriX 2023 | Proprietary and Confidential 4 DRAM bandwidth limits performance in HPC DRAM capacity bottleneckfor Exascale Compute DRAM cost 50% of the server cost The mismatch in capacity and bandwidth between Compute and Memory is derailing performance and TCO. 50% of server cost 25% is stranded 50% of server cost 60% is stranded 50% of server cost 50% is stranded The introduction of CXL opens the door to new opportunities 20230328 IT Press Tour
  4. • PCIe based • Initialization, DMA, memory-mapped IO etc. •

    Mandatory in CXL PCIe Equivalent CXL.MEM • Connection to memory exposed by the device. • Enables memory accesses to/from the device. • Coherency is managed by the Host Memory Semantics • Connection to the processor’s cache/memory. • Enables coherent accesses to/from the device. • Coherency is managed by the Host Cache Semantics 5 © UnifabriX 2023 | Proprietary and Confidential 20230328 IT Press Tour Finally…
  5. 6 © UnifabriX 2023 | Proprietary and Confidential 20230328 IT

    Press Tour Type 1 device CXL Device Types • PCIe based • Initialization, DMA, memory-mapped IO etc. • Mandatory in CXL PCIe Equivalent • Connection to the processor’s cache/memory. • Enables coherent accesses to/from the device. • Coherency is managed by the Host Cache Semantics • PCIe based • Initialization, DMA, memory-mapped IO etc. • Mandatory in CXL PCIe Equivalent CXL.MEM • Connection to memory exposed by the device. • Enables memory accesses to/from the device. • Coherency is managed by the Host Memory Semantics • Connection to the processor’s cache/memory. • Enables coherent accesses to/from the device. • Coherency is managed by the Host Cache Semantics • PCIe based • Initialization, DMA, memory-mapped IO etc. • Mandatory in CXL PCIe Equivalent CXL.MEM • Connection to memory exposed by the device. • Enables memory accesses to/from the device. • Coherency is managed by the Host Memory Semantics Type 2 device Type 3 device
  6. The solution UnifabriX provides: © UnifabriX 2023 | Proprietary and

    Confidential 7 The Ultimate solution for scaling memory capacity and bandwidth eliminating bottlenecks between Compute and Memory unleashing the full performance of compute-intensive workloads 20230328 IT Press Tour
  7. Providing CXL Smart Memory solutions to power HPC datacenters Today!

    Market leader 8 © UnifabriX 2023 | Proprietary and Confidential 20230328 IT Press Tour
  8. © UnifabriX 2023 | Proprietary and Confidential 9 Our product

    Smart Memory Node ™ 20230328 IT Press Tour
  9. © UnifabriX 2023 | Proprietary and Confidential 10 Smart Memory

    Node Standard Memory DIMM Form-Factor Standard Memory EDSFF Form-Factor Standard Memory EDSFF Form-Factor 20230328 IT Press Tour
  10. 11 © UnifabriX 2023 | Proprietary and Confidential Market-ready CXL

    Smart Memory Node™ Product Significant acceleration of real HPC workload using CXL World’s fastest NVMeTM Technology over CXL Dynamic memory pooling with on-demand rescaling CXL 3.0 Fabric World’s Largest HPC Event, November 2022, Dallas TX First to demo LIVE! 20230328 IT Press Tour
  11. © UnifabriX 2023 | Proprietary and Confidential 12 Empowering the

    CXL TOR Switch Server Server Server Server Server Up to x32 Servers per Rack Ethernet Spine Switch Ethernet Spine Switch CXL Links 128/256 GBs (1Tbps/2Tbps) Memory NVMe 33 GBs Ethernet 10G-400G 400G Ethernet Server Server Server Server Server Up to x32 Servers per Rack CXL 3.0 Fabric (optional) 400G Ethernet CXL Gen5/6 CXL Gen5/6 Ethernet over CXL NVMe 10GE 200GE 1GE NVMe Memory Memory Memory 20230328 IT Press Tour
  12. 14 © UnifabriX 2023 | Proprietary and Confidential Stranded Compute

    x2Compute Density First to demo LIVE! Significant acceleration of real HPC workload using CXL performance boost +2 generations of CPU 20230328 IT Press Tour
  13. 15 © UnifabriX 2023 | Proprietary and Confidential HPCG demo

    LIVE! Significant acceleration of real HPC workload using CXL 20230328 IT Press Tour
  14. 16 © UnifabriX 2023 | Proprietary and Confidential World’s fastest

    NVMeTM Technology over CXL 2.0/1.1 Industry performance reference* *Compared to state-of-the-art high-performance PCIe Gen4 NVMe Drive 8x 5x Industry performance reference* Non-disruptive Ultra-fast Checkpointing 20230328 IT Press Tour
  15. 17 Key Value-Vectors for Cloud Service Providers 20230328 IT Press

    Tour 24 vs. 12 servers Performance TCO Reduction Revenue Increase Power Reduction Rack Density 2x 0.5x 0.5x 2x 2x © UnifabriX 2023 | Proprietary and Confidential
  16. © UnifabriX 2023 | Proprietary and Confidential 18 Market Size

    Validation: JP Morgan analysis of MRVL with focus on CXL Market - $1.5B-$1.7B silicon/firmware opportunity in CY24/CY25, 18%-20% growth CAGR Micron CXL-based Memory forecast - $2B in 2025 growing to $20B in 2030 Barclays CXL Market Overview – Jan 2023 IDC Server Market Size growth projections - 21M server units/year (2025) Intel projections for DCAI business - $55B in 2025 (CPU+FPGA+GPU) The opportunity is significant (Barclays) Sizing the market CXL Memory TAM 20230328 IT Press Tour
  17. © UnifabriX 2023 | Proprietary and Confidential 19 CXL Solutions

    Landscape Resource-aaS Fabric Native CXL-HW spec implementation CXL-HW evolution CXL-SW evolution Native CXL-SW spec implementation Memory Pool Composable Rack CXL-enabled CPU CXL Switch Memory Hypervisor OS Rack-Level CXL Connectivity CXL Memory Expander (Single/Multi Head) CXL Redriver CXL Retimer DRAM with CXL Interface CXL Memory Controller (Single/Multi Head) 20230328 IT Press Tour
  18. Memory is 50% of server cost $230B in 2030 Server

    Memory TAM $20B in 2030 DC Stranded Memory 25%-60% $14B-$17B $115B $20B-$25B 70% of CXL Memory goes to CXL Memory Pooling CXL Memory Pooling TAM CXL Memory TAM Server Memory TAM © UnifabriX 2023 | Proprietary and Confidential 20 CXL Memory Pooling - Market Size Model (2030) (1) IDC: https://www.idc.com/promo/servers, assuming conservative 8% CAGR (2) Micron Analyst Day, 2022 (3) Azure: https://arxiv.org/abs/2203.00241 (4) Barclays: CXL Market Overview, 1/2023 (1) (2) (3)(4) (3)(4) Datacenter Server Memory TAM $86B Datacenter Server Memory TAM Servers deployed in mid-large datacenter environments (excl. stand-alone, SMB, small-scale edge etc.) x 50% x 70% x 75% x 70% $86B $115B $21B-$51B x 30% (range is 25%-60%) $25B CXL Memory TAM $17B CXL Memory Pooling TAM $14B CXL Memory Pooling TAM CXL Memory TAM $20B Method 1 Method 2 Server Market Size CXL Memory Market Size 20230328 IT Press Tour
  19. © UnifabriX 2023 | Proprietary and Confidential 21 CXL Memory

    Pooling TAM CXL Memory TAM Includes: • CXL DRAM Memory Pools • CXL Hybrid DRAM/NAND Memory Pools By 2030 significant portion of memory capacity in the rack shifts from legacy DIMM (parallel DRAM) in the Server to CXL Pooled Memory $20B-$25B $14B-$17B Includes: • CXL Memory Pooling • CXL Memory Expansion • CXL Fabric-attached Memory UnifabriX System SAM (excl. memory) $3.4B | $2.8B • SMN 20%-30% of memory media cost Every new server coming to market from 2023 has CXL built in CXL Memory Pooling TAM & our SAM (2030) 20230328 IT Press Tour
  20. 2024 - HPC server revenue Run-To-Market © UnifabriX 2023 |

    Proprietary and Confidential 22 First, we take HPC then we take Cloud…. Identified the HPC market as our foot in the door (2023-2025) • Early adopters, looking to engage in emerging technologies • Deep pockets, less sensitive to cost • Performance is more important than TCO • Short time to revenue • Major step towards the big trophy (Cloud) • Both markets are sharing the same OEMs Proven Technology Economies of scale (our own ASIC) Vendor Credibility Verified Product Market Fit Market Maturity (Ecosystem and etc.) Cloud and On-prem as our target market (>2025) • Primetime • Leadership position • Advanced features of CXL 3.0 and more • Preferred cost structure  higher GM 45B 2024 - Overall server revenue 116B .t4.ai/industry/server-market-share hpcwire.com/2021/06/28// 20230328 IT Press Tour
  21. © UnifabriX 2023 | Proprietary and Confidential 24 Semiconductor Revenue

    Forecast by Device Type Through 2025 • Subsegment of General-Purpose Semiconductor Markets • Subsegment of Application-Specific Semiconductor Markets Source: Gartner: NAND TAM second only to DRAM, Chris Mellor, Block & Files, August 2nd, 2021 https://blocksandfiles.com/2021/08/02/gartner-nand-tam-second-only-to-dram/ -6% 0% 6% 12% 18% 0 20 40 60 80 100 120 TAM CAGR 2025 TAM ($B) General-Purpose Logic Discrete Wired Connectivity Nonoptical Sensors Microprocessor DRAM Flash Memory, NAND Optoelectronics Others Analog Discrete Cellular Baseband Discrete AP/MP Microcontroller Wireless Connectivity Power Management Discrete GPU RF Front End and Transceivers Integrated Baseband/ Application Processor Gartner DRAM >$100B TAM Most expensive component of datacenter Infrastructure 20230328 IT Press Tour