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Verification of Embedded Application – Approaches to Perform Worst Case Execution Timing

Verification of Embedded Application – Approaches to Perform Worst Case Execution Timing

This presentation is among the Top 27 Best Papers/Practice/Tutorials selected, out of 460+ submissions received, to be presented @STC 2012.

Presentation Abstract

In today’s age most of the automobiles, airplanes, power plants, etc. are controlled by computer systems interacting in real time environments. Failure of real time systems endangers the human life. A common cause of failure is timing violations; i.e., the deadlines are missed. It is one of the performances of the software. The best way to predict the execution timing performance is, by performing the Worst Case Execution Timing Analysis (WCET) that helps to address the failures due to overshooting of allocated time. The goal of the Worst Case Execution Timing exercise is to assess the timing of the embedded system design thereby increasing the confidence of robustness/stability of the system. It is a key component when designing and verifying real-time systems, especially when used to control safety-critical systems.

The approach used for Worst Case Execution Timing analysis is analyzing the call tree and executing the respective paths.

About the Author

K S Sreetha is a Software Engineer with Eaton Technologies Pvt. Ltd. She has around 6.5 years of software experience in Independent Verification and Validation activities in the Avionics domain for Embedded C Projects. Her core skills include System Level Testing , Unit level Testing , Regression Testing , Stack and Timing Analysis for the embedded products and Compliance with the safety guidelines for aerospace(DO-178B). She also has hands on experience in Hardware in loop testing.

Prior to joining Eaton, Sreetha was with HCL Technologies and before that a Research Fellow at Aeronautical Development Agency. She has worked in prestigious projects like Boeing Dreamliner 787 and Tejas (LCA).

Sreetha graduated as a topper from Bharathiar University receiving her undergraduate degree in Electrical and Electronics Engineering. She also topped her batch in the MS Embedded Systems program from BITS Pilani

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Transcript

  1. Verification of Embedded Application – Approaches to Perform Worst Case

    Execution Timing 1 1 Execution Timing K S Sreetha 06-Dec-2012
  2. • Introduction • Timing Analysis • Different Approaches • Static

    Analysis Agenda 2 2 • Dynamic Analysis • Conclusion • Q&A
  3. Introduction • In Industries - avionics, automobile, nuclear plant, space

    research, medical etc.- safety plays a vital role. • Usage of real time embedded applications in various industries is increasing 3 3 industries is increasing rapidly.
  4. Real Time Systems • The data is processed with respect

    to time. • Timing constraints is one of the most important issues in real-time embedded system designs. 4 4
  5. Real Time Systems • The real time systems are classified

    into three types based on the deadline. • Hard Real Time Systems • Soft Real Time Systems • Firm Real Time System 5 5 • Firm Real Time System
  6. WCET cont… • Objective - Software implementation execution does not

    exceed the allocated frame time (the time allocated for a frame/task). • The WCET provides the worst case execution time; this is 7 7 • The WCET provides the worst case execution time; this is the time when the system behaves in the worst scenario.
  7. WCET cont… 8 8 • The WCET gives the safe

    time that no underestimation is considered and tight time that a small overestimation is considered. • Best Case Execution Time (BCET) gives the best execution time of the system with the normal inputs.
  8. Static Analysis • Without execution of the code on the

    hardware. • Advantages: • It guarantees that worst-case timing path can be covered from overall analysis. 9 9 covered from overall analysis. • Dis Advantages: • Time consuming. • There is no execution; it is not possible to consider the hardware factors.
  9. Dynamic Analysis • Execution of the software on the target

    hardware or on an evaluation board • All abnormal conditions are considered. 10 10 • Inputs to be simulated or some prerequisites need to be satisfied. • Interrupts to be simulated or generated.
  10. Dynamic Analysis cont.. • The steps involved in this approach

    are mentioned in the below section. • Test Design/Analysis • Test Execution 11 11 • Test Execution • Integration Figure 2
  11. Dynamic Analysis cont.. Test Design/Analysis • The program representation is

    captured through control flow diagram. • The control flow diagram gives the pictorial representation of the control flow of the code. 12 12 representation of the control flow of the code.
  12. Selection of Inputs • Knowledge of the system is very

    important • Consider Max and Normal Values of input. 13 13
  13. Dynamic Analysis cont.. Test Execution: • The time could be

    captured in the oscilloscope, or any of the measuring instruments. 14 14
  14. Dynamic Analysis cont.. Integration: • The integration is the third

    and last step in this approach • Integrates the functions individual WCET to get the WCET of the entire software. 15 15 of the entire software. • Bottom to top integration
  15. Dynamic Analysis cont.. Function4( ) { If ( ) {

    // Path I Statement1; If function4 has two paths like 16 16 Statement1; Statement2; } Else { //Path J Statement2; Statement3; Statement3; } }
  16. Dynamic Analysis cont.. Function4 path Time(µs ) Path I (If

    condition ) 640 Path J (else condition) 800 17 17 As per this data table the worst time consuming path is “ELSE condition “Path J.
  17. Dynamic Analysis cont.. Function5 path Time(µs) Path I (If condition

    ) 1000 PathJ(else condition) 500 18 18 As per this data table the worst time consuming path is “IF condition “Path I.
  18. Dynamic Analysis cont.. Consider time for the function call =

    320µs Execution Time (ET) for PATH d = WCET of Function4+Function call of 4 +executable of Function1 19 19 Function4+Function call of 4 +executable of Function1 = 800 + 200 + 320 = 1320
  19. ET for PATH h = WCET of Function5+Function call of

    5 +executable of Function1 = 1000 + 200 +320 20 20 = 1530 ET for PATH b= WCET of PATH h+ Function call of 1 +executable of Function main
  20. Worst Case Timing Calculation • Worst case Time = maximum

    time path + ET of the Interrupts • Timing Margin (%) = (1- (Worst case Time /Total time allocated))*100 21 21 allocated))*100 • It is recommended that WCET usage should not exceed 50% of the allocated time margin
  21. Dynamic Analysis cont.. • Advantages • Deals with real run-time

    usage • Guaranteed that the worst-case time path has been covered 22 22 • Disadvantages • Manual errors • The approach is time consuming.
  22. Conclusion • Best feasible method to for the embedded software

    application. • Calculation allows for the expression of the most complex flows. • This approach can be used in safety critical software 23 23 • This approach can be used in safety critical software applications like aerospace, medical, and defense, etc