I wanted a computer, but all I got was a transistor

I wanted a computer, but all I got was a transistor

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Denis Defreyne

September 08, 2015
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Transcript

  1. I wanted a computer, but all I got was a

    transistor. Denis Defreyne 1
  2. 2 I will explain how to build a computer from

    scratch. I cannot do this without taking some shortcuts. I will tell lies. CAUTION
  3. 3

  4. In the beginning, the transistor was created. 4

  5. 5 GATE SOURCE DRAIN

  6. 6 GATE SOURCE DRAIN

  7. 7 GATE SOURCE DRAIN

  8. 8

  9. 9

  10. 10

  11. 11

  12. 12 AND

  13. 13

  14. 14

  15. 15

  16. 16

  17. OR 17

  18. Now we have gates, and we can forget about transistors.

    18
  19. 19 OR AND XOR NAND NOT …

  20. A B Sum 0 0 0 0 1 1 1

    0 1 1 1 0 20
  21. A B Carry 0 0 0 1 A B Sum

    Carry 0 0 0 0 1 1 1 0 1 1 1 0 21 AND XOR
  22. 22 AND A B CARRY XOR SUM

  23. ADD CARRY SUM A B 23

  24. 24 ADD CARRY SUM A B CARRY

  25. 25 ADD SUM 0 A 0 B 0

  26. 26 ADD SUM 0 A 0 B 0 ADD SUM

    1 A 1 B 1
  27. 27 ADD SUM 0 A 0 B 0 ADD SUM

    1 A 1 B 1 ADD SUM 0 A 0 B 0 ADD SUM 1 A 1 B 1 ADD A 2 B 2 SUM 2
  28. 28 ADD A B SUM

  29. ADD 00010001 00000101 00010110 29

  30. ADD 17 5 22 30

  31. 31 ADD R A B MUL R A B DIV

    R A B MOD R A B
  32. A B ADD MUL DIV MOD R R R R

    32
  33. A B ADD MUL DIV MOD MUX S R 33

  34. 34 MUX

  35. 35 0 MUX

  36. 36 1 MUX

  37. 37 2 MUX

  38. 38 3 MUX

  39. 39 A B ADD MUL DIV MOD MUX S R

  40. 40 ALU R A B S

  41. A B S Result 15 7 0 (+) 22 15

    7 1 (*) 105 15 7 2 (/) 2 15 7 3 (%) 1 41
  42. Now we have an arithmetic logic unit. 42

  43. 43 OR NOT OR NOT Q S R

  44. OR NOT OR NOT Q S R 44

  45. OR NOT OR NOT Q S R 45

  46. OR NOT OR NOT Q S R 46

  47. OR NOT OR NOT Q S R 47

  48. OR NOT OR NOT Q S R 48

  49. 49 SR-LATCH S R Q set reset

  50. D-LATCH D E Q 50 data enable write

  51. 51 D-LATCH D 0 Q 0 D-LATCH D 1 Q

    1 D-LATCH D 2 Q 2 D-LATCH D 3 Q 3 D-LATCH D 4 Q 4 D-LATCH D 5 Q 5 D-LATCH D 6 Q 6 D-LATCH D 7 Q 7 E
  52. 52 REGISTER (8 BIT) D E Q

  53. Now we have registers. 53

  54. Q: What distinguishes a computer from a simple calculator? 54

  55. A: You can program a computer, but not a calculator.

    55
  56. 56 OPCODE VALUE 1 VALUE 2 2 7 15

  57. 57 OPCODE VALUE 1 VALUE 2 ALU R

  58. OPCODE VALUE 1 VALUE 2 ALU REGISTER (8 BIT) 1

    58
  59. OPCODE VALUE 1 VALUE 2 ALU REGISTER FILE OUTPUT REG

    1 59
  60. OPCODE INPUT REG 1 INPUT REG 2 REGISTER FILE OUTPUT

    REG ALU 0 0 1 60
  61. 61 OPCODE INPUT REG 1 INPUT REG 2 OUTPUT REG

  62. 62 INSTRUCTION REGISTER OPCODE INPUT REG 1 INPUT REG 2

    OUTPUT REG
  63. 63 MEMORY INSTRUCTION REGISTER OPCODE INPUT REG 1 INPUT REG

    2 OUTPUT REG
  64. MEMORY INSTRUCTION REGISTER OPCODE INPUT REG 1 INPUT REG 2

    OUTPUT REG 0 64
  65. 65 INSTRUCTION POINTER REGISTER MEMORY INSTRUCTION REGISTER OPCODE INPUT REG

    1 INPUT REG 2 OUTPUT REG
  66. 66 INSTRUCTION POINTER REGISTER MEMORY INSTRUCTION REGISTER ADD 4 OPCODE

    INPUT REG 1 INPUT REG 2 OUTPUT REG
  67. Now we have the hardware for a programmable computer, and

    we can forget the hardware. 67
  68. 68 0 3 0 2 Add register 0 and register

    2, and store result in register 3: OPCODE INPUT REG 1 OUTPUT REG INPUT REG 2
  69. 69 “add r3 r0 r2” Add register 0 and register

    2, and store result in register 3:
  70. 70 “add r3 r0 r2” 0 3 0 2 assembly

    language machine code assembler
  71. 16 0 0 12 127 56 16 1 0 3

    224 211 18 1 0 0 0 0 7 32 15 2 1 19 1 0 1 15 0 2 6 12 14 0 255 0 71
  72. li r0, 819000 li r1, 254163 cmpi r1, 0 jeq

    @end mov r2, r1 mod r1, r0, r1 mov r0, r2 jmp @start prn r0 halt 72
  73. 73 cmp mod add sub mul div xor or and

    shl shr not ARITHMETIC
  74. 74 j je jne jg jge jl jle cmp mod

    add sub mul div xor or and shl shr not lw lh lb sw sh sb STACK FUNC SPECIAL call ret push pop prn halt BRANCHING ARITHMETIC mov li MEMORY REG
  75. DEMO 75

  76. github.com/ddfreyne/rcpu 76

  77. 77

  78. 78 slack @denis / mail denis@soundcloud.com Denis Defreyne Ask me

    about Belgian beer.